FPGA Synthesis and Analysis HDL coder

Hello everyone I am implementing my algorithm using HDL coder but all tasks are performed of HDL workflow Advisor but when it reaches the step of FPGA synthesis it stuck on processing of logic synthesis .... What to do with this issue your suggestions would be highly appreciated

thanks

Answer 1

[Kiran Kintali]

There are many reasons for the synthesis step to be taking a long time.

If the generated HDL does not fit on the FPGA or very close to maximum available part count on the FPGA can lead to long synthesis times.

Please refer to your synthesis tool documentation on the best practices to improve synthesis times.