MATLAB as AXI master and FIL tool at the same time

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dr446
dr446 on 26 Feb 2019
Answered: Kritika Bhardwaj on 20 May 2021
I have a system that requires reading from external ddr3 memory. I also have handwritten verilog code that I want to run using the FPCA in Loop tool. Is it possible to include the AXI Master IP as a block in simulink along with a black box subsystem containing my HDL code? I need them both to run at the same time.

Answers (1)

Kritika Bhardwaj
Kritika Bhardwaj on 20 May 2021
Hi,
Hi,
Yes, you can run MATLAB as AXI master and FPGA-in-the-loop at the same time depending on the interface that you are using for the connection.
You can run FPGA-in-the-loop and MATLAB as AXI Master simultaneously, if you run one feature over one interface and another feature over other interface. For example, you can run FPGA-in-the-loop over Ethernet connection and MATLAB as AXI Master over JTAG or Ethernet (with different port number) or PCI Express connection, and vice versa. To know how to run FPGA-in-the-loop over JTAG, Ethernet, or PCI Express, see this example https://www.mathworks.com/help/hdlverifier/ug/verify-hdl-implementation-of-pid-controller-using-fpga-in-the-loop.html. For MATLAB as AXI Master over Ethernet and PCI Express, see these examples.
You can run MATLAB as AXI master or FPGA-in-the-loop over a JTAG cable to your board. However, each feature requires exclusive use of the JTAG cable, so you cannot run more than one feature at the same time. To allow other tools access to the JTAG cable, such as programming the FPGA, and Xilinx ChipScope/Quartus SignalTap, you must discontinue the JTAG connection in MATLAB. For more information on how to release the JTAG cable, see https://www.mathworks.com/help/supportpkg/xilinxfpgaboards/ug/supported-eda-tools-and-hardware.html for Xilinx boards and https://www.mathworks.com/help/supportpkg/alterafpgaboards/ug/supported-eda-tools-and-hardware.html for Intel boards.
Thanks!

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