PLL Frequency Synthesis Examples

Version 1.0.0.2 (1,31 Mo) par Dick Benson
An Assortment of Simulink PLL Models
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Mise à jour 24 nov. 2018

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This is a collection of PLL modeling examples, both continuous and discrete time. It includes integer as well as fractional N, dual modulus, SERDES clock recovery, as well as design sequences that step through the design flow.

Citation pour cette source

Dick Benson (2025). PLL Frequency Synthesis Examples (https://www.mathworks.com/matlabcentral/fileexchange/52181-pll-frequency-synthesis-examples), MATLAB Central File Exchange. Extrait(e) le .

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discrete_time_pll

pll_design_cp_v2

discrete_time_pll

discrete_time_pll/hdlsrc/discrete_pll_10

pll_design_cp_v2

Version Publié le Notes de version
1.0.0.2

Added control systems TB to requirements.

1.0.0.1

Updated license
1.0.0.0