Guided Code Generation

Guided code generation using the Configuration Parameters dialog box and Simulink HDL Workflow Advisor

You can generate HDL code for Simulink^® models from the UI by using the HDL Code tab in the Simulink toolstrip or by using the Configuration Parameters dialog box. In this dialog box, you can specify various HDL code generation settings including basic folder and language selection to more advanced optimization parameters. To learn about how to generate HDL code from the HDL Code tab, see Generate HDL Code from Simulink Model.

To deploy the generated code to a target device, use the Simulink HDL Workflow Advisor. The Advisor can run end-to-end workflows that check HDL compatibility and deploy the generated code to a target device. HDL Workflow Advisor is not available in Simulink Online™.

Functions

`hdladvisor`	Display HDL Workflow Advisor
`hdlsetup`	Set up model parameters for HDL code generation
`hdlsetuptoolpath`	Set up system environment to access FPGA synthesis software

Checks

HDL Coder Checks in Model Advisor / HDL Code Advisor Overview

Check for global reset setting for Xilinx and Altera devices

Check algebraic loops

Model Settings

expand all

Code and Model Generation Settings

HDL Code Generation Top-Level Pane Overview

Target Language and Folder Selection Parameters

Code Generation Output Parameter

Model Generation Parameters for HDL Code

Naming and Layout Options for Model Generation

Language-Specific Comments and Identifiers

Global Settings Overview

Language-Specific Identifiers and Postfix Parameters

Language-Specific File Extension Parameters

Comment in header

RTL Style Parameters

VHDL Architecture and Library Name and Code for Model Reference Parameters

File Comment Customization Parameters

Generate Statement and Vector and Component Instance Label Parameters

Topics

Using HDL Workflow Advisor

Workflows in HDL Workflow Advisor
Learn about the HDL Workflow Advisor and various workflows you can choose and platforms you can target.
Getting Started with the HDL Workflow Advisor
Learn the basics of the HDL Workflow Advisor and how to run various tasks.
HDL Workflow Advisor Tasks
Describes HDL Workflow Advisor tasks.
Generate Code and Synthesize on FPGA Using HDL Workflow Advisor
The HDL Workflow Advisor guides you through the stages of generating HDL code for a Simulink subsystem and the FPGA design process, such as:

Using Model Configuration Parameters Dialog Box

Set HDL Code Generation Options
Access HDL options in the Configuration Parameters dialog box, Simulink Toolstrip, or HDL Block Properties window.
HDL Code Generation Options in Configuration Parameters Dialog Box
Access HDL options under various panes in the HDL Code Generation pane of the Model Configuration Parameters dialog box.
Generate HDL Code from Simulink Model Using Configuration Parameters
Use the Configuration Parameters dialog box to generate HDL code for your Simulink model.
Obfuscate Generated HDL Code from Simulink Models
Learn how to obfuscate the generated VHDL^®, Verilog^® or SystemVerilog code from your model.